The present invention generally relates to semiconductor devices. More specifically, the present invention relates to semiconductor light-emitting devices and processes for producing same.
Among known semiconductor light-emitting devices is one which consists of a low-temperature buffer layer, an n-side contact layer of Si-doped GaN, an n-side cladding layer of Si-doped GaN, an active layer of Si-doped InGaN, a p-side cladding layer of Mg-doped AlGaN, and a p-side contact layer of Mg-doped GaN, which are sequentially formed on top of the other over the entire surface of a sapphire substrate. Commercial products of such structure, available in large quantities, are blue and green LEDs (Light-Emitting Diodes) which emit light with wavelengths ranging from 450 nm to 530 nm.
Growing gallium nitride crystal on a sapphire substrate is a common practice. The sapphire substrate used for this purpose is usually one which has the C-plane (i.e., the (0001) plane in accordance with Miller indices of a hexagonal crystal system) as the principal plane. Consequently, the gallium nitride layer formed on the principal plane also has the C-plane, and the active layer, which is formed parallel to the principal plane of the substrate, and the cladding layers holding the active layer between them are also parallel to the C-plane. The semiconductor light-emitting device having crystal layers sequentially formed on the basis of the principal plane of the substrate has a smooth surface desirable for the formation of electrodes, due to the smoothness of the principal plane of the substrate.
A disadvantage of growing gallium nitride on a sapphire substrate is that dislocations may densely exist in the crystals due to lattice mismatch between them. Attempts have been made to eliminate defects in the grown crystals by forming a low-temperature buffer layer on the substrate. Japanese Patent Laid-open No. Hei 10-312971 discloses the combination with epitaxial lateral overgrowth (ELO) for reduction in crystal defects.
Also, Japanese Patent Laid-open No. Hei 10-321910 discloses a semiconductor light-emitting device, wherein the light-generating region extends vertically to the principal plane of the substrate in a hexagonal prismatic structures which is formed on the substrate such that its (10-10) or (1-100) M-plane is vertical (i.e., substantially perpendicular) to the principal plane of the substrate. The active layer, vertical to the principal plane of the substrate, is known to be effective in suppressing defects and dislocations due to lattice mismatch with the substrate and reducing strain due to difference in the coefficient of thermal expansion.
Moreover, Japanese Patent Laid-open No. Hei 8-255929 discloses a process for producing a light-emitting device. The process consists of forming, on a substrate, a layer of gallium nitride compound semiconductor of one conductivity type, covering part of the layer with a mask, forming, on the uncovered part, a layer of gallium nitride compound semiconductor (including a layer of another conductivity type) by selective growth, and forming a p-electrode and an n-electrode.
The technique of forming a hexagonal prismatic structure vertical to the principal plane of the substrate as disclosed in Japanese Patent Laid-open No. Hei 10-321910 requires that the film obtained by HVPE (hydride vapor phase epitaxy) should be followed by dry etching to give the (10-10) or (1-100) M-plane. Unfortunately, dry etching inevitably damages the crystal face. In other words, dry etching deteriorates the characteristic properties of crystals despite its effect of suppressing threading dislocations from the substrate. Further, an additional production step or process stage is required to perform dry etching.
It is known that selective growth on the C+-plane of the sapphire substrate gives a crystal layer with sharp peaks surrounded by the (1-101) plane or the S-plane (See Japanese Patent No. 2830814, paragraph 0009 of specification). The layer thus obtained is not flat enough for the electrode to be formed thereon. Therefore, it has never been used for electronic devices and light-emitting devices, and is merely used as an underlying layer of crystal structure for further selective growth.
Any device having a surface parallel to the principal plane of the substrate needs a flat surface for good crystal properties. As the result, it is usually constructed such that the electrodes spread horizontally. A disadvantage of this structure is that the horizontally spread electrodes make for extremely difficult and time-consuming work because one must separate miniature chips without cutting the horizontally spread electrodes. Moreover, the sapphire substrate and nitride (such as GaN) are so hard that they are difficult to cut and require a cutting allowance of about 20 μm (i.e., micrometers), thereby making it even more difficult to cut the miniature chips.
Additionally, a problem with a light-emitting device in which the principal plane of the substrate is a C+-plane and the active layer of gallium nitride is formed parallel to the principal plane of the substrate is that there is only one bond from gallium atoms to nitrogen atoms in the C+-plane and hence, nitrogen atoms easily dissociate from the crystal face of the C+-plane, thereby making it difficult for the effective V/III ratio to be large, which in turn prevents improvement in performance of crystals constituting the light-emitting device.
The technology disclosed in Japanese Patent Laid-open No. Hei 8-255929 has an advantage of using selective growth which obviates the necessity of etching, such as reactive ion etching. However, it presents difficulties in forming the n-electrode accurately because large production steps occur in its vicinity after the mask layer has been removed. A disadvantage of forming the active layer parallel to the principal plane of the substrate, as in the light-emitting device disclosed in Japanese Patent Laid-open No. Hei 8-255929, is that the end of the active layer is exposed to air, thereby resulting in oxidation and deterioration of the active layer.
It is known that an LED device can be used as a light source for large display (such as projection display). To this end, it is important for LED devices to have higher brightness, better reliability, and lower production costs. The brightness of LED devices is governed by two factors: the internal quantum efficiency, which depends on the crystal properties of the active layer; and the light emergence efficiency, which is a ratio of light which has escaped from the device to light which has been generated in the device.
In general, a light-emitting diode has a light-generating region, the typical structure of which is shown in FIG. 1. The major parts of the light-generating region include an active layer 400 of, typically, InGaN, a first conductive layer 401 and a second conductive layer 402 (which hold the active layer 400 between them), and a reflecting film 403 (which also functions as an electrode) on the second conductive layer 402 opposite to the active layer 400, with the interface between the reflecting film 403 and the second conductive layer 402 functioning as a reflecting plane 404. Part of the light generated by the active layer 400 emerges directly from the light emerging window 405 in the first conductive layer 401, and part of the light advancing toward the second conductive layer 402 is reflected by the reflecting plane 404 and the reflected light advances toward the light emerging window 405 in the first conductive layer 401.
A disadvantage of the above-mentioned light-emitting diode of ordinary structure is that light generated by the active layer 400, however efficient it might be, cannot be extracted from the device due to total reflection that takes place at an interface between the device and the outside, between the device and the transparent substrate, and/or between the transparent substrate and the outside. In other words, light incident to the interface at an angle smaller than the critical angle is subject to total reflection. The critical angle depends on the refractive indices of the two materials forming the interface. In the light-emitting diode of surface emitting type which has the reflecting plane 404 and the light emerging window 405 parallel to each other as shown in FIG. 1, the light which has undergone total reflection at an angle smaller than the critical angle undergoes total reflection continuously between the reflecting plane 404 and the light emerging window 405. Hence, such light cannot be extracted as an effective output.
Attempts have been made to improve light emergence efficiency by forming a convex or a slope which changes the optical path in the device, so that the convex or slope functions as the reflecting plane which permits light to emerge efficiently. This technique, however, is not readily applicable to the GaN semiconductor which is used for blue or green LEDs. At present, it is believed that forming a sophisticated shape in an extremely small region is not known.
A sectional view of a light-emitting device of surface emitting type is shown in section in FIG. 2. It is formed on a substrate for growth 500 of sapphire. On the substrate 500 are sequentially formed a first conductive layer 501 of gallium nitride semiconductor, an active layer 502 of gallium nitride semiconductor, and a second conductive layer 503 of gallium nitride semiconductor, all parallel to the principal plane of the substrate. The active layer 92 and the second conductive layer 503 are partly removed such that an opening 506, whose bottom penetrates into the first conductive layer 501, is formed. In the opening 506, a first electrode 504 is formed such that it connects to the first conductive layer 501. A second electrode 505 is formed on the second conductive layer 503, thereby connecting to the second conductive layer 503.
A simple way to meet requirements of the light source for large displays is to increase the device size according to the desired brightness. However, the optical design limits the size of the light-generating region, which presents difficulties in producing a device having high brightness as well as a large light-generating region. Moreover, the active region in the device is also limited by the arrangement of the light emerging window and the electrodes for efficient current injection. At present, therefore, the requirement for high brightness is met by injecting more than the specified current into the actual device. However, increased current injection impairs device reliability.
On the other hand, decreasing the device size of light-emitting diode is expected to reduce production cost through improvement in yields. There is a strong demand for size reduction in the area where LEDs in an array having individual pixels for display. However, size reduction leads to an increased load per unit area, which contradicts the above-mentioned requirements for high brightness and high reliability.
Moreover, if the device size is to be reduced below tens of micrometers or less, the region for the active layer is greatly limited by the electrodes 504 and 505 (shown in FIG. 2) and the device separating grooves. The region where the conductive layers 503 and 501 come into contact with the electrodes 505 and 504 should be as large as possible to keep resistance low. However, enlarging the electrodes reduces the area through which light emerges from the active region, which leads to reduced brightness.
A need, therefore, exists to provide a micro-size light-emitting device with efficient light emergence, high brightness, minimum load on the active layer and controlling threading dislocations from the substrate that can be produced under optimal process conditions.